Squeezing FPGA Memory to make an Apple II disk controller #FPGA #VintageComputing

The Big Mess o’ Wires (BMOW) blog discusses developing an Apple II disk controller that’s based on the UDC disk controller.

The original UDC card had 8K of ROM and 2K of RAM, so it needs 10K of combined memory. The FPGA device I’m using for prototyping, a Lattice MachXO2-1200, has 8K of embedded block RAM and 1.25K of distributed RAM. It also has 8K of “user flash memory”.

So will the UDC design fit? It’s close, but I think the answer is no.

I could switch to a larger FPGA with more memory, or add a separate RAM or ROM chip. But that would increase cost and complexity, and anyway wouldn’t help with my prototype board that’s already built.

The post contemplates various ways to squeeze things to fit in the available memory space or consider memory expansion or a larger FPGA.

See the post here.